Compiled and Synthesized UML, a practical Approach for Codesign.

Embedded systems are complex systems with limited resources such as reduced processor power or relatively small amounts of memory and so on. The realtime aspect may also play an important role, but it is definitely not a main consideration of this work. Complexity of recent embedded systems is growing as rapidly as the demand for such systems and can be managed only by the use of a model-driven design approach. Since modeling languages such as unified modeling language (UML) are semiformal, they allow the design of systems that cannot be implemented using formal languages such as C/C++ or very high speed integrated circuit (VHSIC) hardware description language (VHDL). This chapter intends to show how the gap between model and formal language can be bridged. First, a set of rules restricts the use of model elements in a way that the model will become executable. Furthermore, a unique mapping between UML and formal language elements enables automatic code generation. Formal verification at model level is an important consideration and becomes possible by the fact that rules restrict the application of model elements. UML to software (C/C++) and UML to hardware (VHDL) mapping form the base for a practical codesign approach where a part of the system is realized through software and another part through hardware. Mapping of UML to programming languages is well known today and achieved by many tools. Mapping of UML to hardware description languages (HDLs) is less known and not realized in tools. This chapter documents an attempt to define a set of rules and to implement UML to VHDL mapping in a practical code generator. It also shows parts of a realworld sample that was realized to verify usability and stability of rules and map231 A. Vachoux (ed.), Applications of Specification and Design Languages for SoCs – Selected papers from FDL 2005, 231–246. © 2006 Springer. 232 Cathy Berthouzoz et al. ping. Finally, an outlook on further developments as improvement of the UML to VHDL mapping and a simple codesign process called 6qx will be given.