Real-time FPGA-based intradyne coherent receiver for 40 Gbit/s polarization-multiplexed 16-QAM
2011
Real-time detection of a 40 Gbit/s polarization-multiplexed square 16-QAM signal is demonstrated in an FPGA-based intradyne coherent receiver processing 100% of data. A minimum BER of 3.3×10 −5 is achieved.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
10
References
8
Citations
NaN
KQI