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Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ.
Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ.
2017
Benedikt Janßen
Tim Wingender
Michael Hübner
Keywords:
Computer architecture
Overlay
Hardware acceleration
Computer science
Python (programming language)
Field-programmable gate array
Embedded system
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