Method for increasing height of control grid of split-gate quick flash memory

The invention provides a method for increasing the height of a control grid of a split-gate quick flash memory. A high-voltage gate medium layer of non-uniform thickness at the polysilicon surface is removed, a dielectric layer of relatively uniform thickness of formed at the polysilicon surface, so that when polysilicon is etched subsequently, the dielectric layer near the top of the sidewall of the polysilicon is not etched severely. Thus, the sidewall of the polysilicon can be protected, recess of a formed word line is relatively high, penetration caused by subsequent ion implantation is avoided, and the device performance is improved.