Integration of fractional-N frequency synthesizer and analog-to-digital converter for wireless control and medical robot

Integrated low-power fractional-N frequency synthesizer with a sub-sampling charge pump (SSCP) circuit, a randomly selected phase frequency detector (PFD) and successive approximation register (SAR) analog-to-digital converter (ADC) are simulated in a TSMC 0.18-um CMOS process is presented. The low-spur frequency synthesizer randomizes the periodic ripples on the control voltage of the voltage controlled oscillator to reduce the reference spur at the output of the phase-locked loop. The comparators followed by an asynchronous trigger logic, the proposed SAR ADC achieves to work in high speed zone for biomedical and wireless communication.