Integration of large-scale FPGA and DRAM in a package using chip-on-chip technology

A field-programmable multi-chip module containing one ORCA 3T/125 FPGA and 4 MByte DRAM was built using chip-on-chip technology. Module architecture and physical design issues are presented. A PCI board consisting of four chip-on-chip modules is also built as the test vehicle. The design environment for this multi-chip module, including visual or C++ design entry and bit-serial datapath synthesis system, is also discussed. Some ongoing approaches, like double-flip technology and area I/O are also addressed.