A low — Voltage hysteresis comparator for low power applications

A Hysteresis comparator with low supply voltage is proposed. The comparator has PMOS input stage, NMOS current mirror, and PMOS load stage using positive feedback. The signal of the PMOS input stage is sent to the PMOS load stage via the NMOS current mirror. Positive feedback of the PMOS load stage introduces bistable characteristics to the comparator. The hysteresis comparator with low voltage operation is required for low power applications using under noisy environment. With bistable characteristics, the comparator has two different trip point voltages when input signal crosses reference signals to upper side or crosses to lower side. The hysteresis comparator can compare input signal and reference signal correctly under noisy environment. To achieve low power system, decreasing supply voltage is widely used. Conventional hysteresis comparator doesn't suite for low power applications because it is difficult to operate transistors in comparator in saturation region. In this paper, we proposed the hysteresis comparator operating in low supply voltage. Proposed comparator operates in 0.8V supply voltage. The area of the proposed comparator is 203.5μm 2 , power consumption is 0.24μW. To achieve the low voltage operation, the proposed hysteresis comparator's input differential pair is connected to lord stage with positive feedback via the NMOS current mirror. In the load stage with positive feedback, PMOS tail transistor is used to decrease the static power consumption. The proposed comparator is suitable for low power analog — digital converters and sensor applications for battery operation applications which are used in noisy environments.