Three-dimensional integrated circuit, a processor, a method of manufacturing a semiconductor chip and three-dimensional integrated circuits

Three-dimensional integrated circuit 1 which is one embodiment of the present invention is made by laminating the first semiconductor chip and second semiconductor chip, the bonding surface of the other chips of all the wiring layers of the first semiconductor chip nearest the arrangement of the power supply conductor region and the grounding conductor region in the wiring layer, the power supply conductor region at the closest wiring layer at the interface between the other chips of all the wiring layers of the second semiconductor chip and the arrangement of the ground conductor region are the same, at least a portion of said first semiconductor chip power supply conductor region closest wiring layer on the bonding surface of the can through an insulating layer, the second the opposed to at least a portion of the ground conductor area of ​​the wiring layer closest to the junction surface of the semiconductor chip.