Towards ultimate scaling of LDMOS with Ultralow Specific On-resistance

This paper presents the silicon demonstration of a novel Trench MOSFET with ultra-low specific on-resistance Ron*A. With drain and source contact placement at the top silicon surface, our device combines the benefits of vertical current flow as leveraged in discrete power devices with ease of CMOS platform integration that has been a key advantage of LDMOS transistors commonly used in BCD technologies. Our unique process flow provides for an asymmetric placement of the field-plate inside the trench enabling best-in-class performance of Ron* $\mathrm{A}=53\mathrm{m} \Omega$ mm2 with a break-down voltage BV=127V. The performance is greater than 2 times compared to the best BCD technology and similar to the record performance of Ref [2] with a simpler process.