PLL with frequency and initial-phase-angle detectors: performance analysis and speed/robustness tradeoff improvement

Phase-locked loops (PLLs) are well known tools for synchronisation and measurement of the fundamental parameters of power grid signals. Signals measured in the electrical industry may contain disturbances such as harmonic distortion, dc offset, noise and unbalanced conditions which destroy the pure sinusoidal form of signals. The present study improves the trade-off between PLL disturbance-rejection capability and dynamic-response speed. An improved PLL is proposed based on frequency and initial-phase-angle detectors (FIPD) and moving average filter for measurement of the signal parameters in both single-phase and three-phase applications. The proposed PLL is called improved FIPD-based PLL (IFIP-PLL) and provides satisfactory disturbance rejection and response time. The proposed structure effectively decreases the estimation error. Simulation and experimental results show the superiority of IFIP-PLL over conventional PLLs.