Evaluation of fine-grained parallelism in AUTOSAR applications

Parallelization of AUTOSAR legacy software is a fundamental step to exploit the performance of multi-core electronic control units (ECUs). However, communication between runnables causes serialization and intra-task parallelization can therefore introduce large idle intervals, if a task contains a long critical path. Distributing the instructions of a runnable over cores (fine-grained parallelism) can reduce the serialization to a shorter time, but this requires an efficient and timing analyzable implementation. This paper investigates the efficiency of fine-grained parallelism for reducing the worst-case execution time in automotive applications. A pattern-supported parallelization approach is applied to extract parallelism of runnables in a structured way. Algorithmic skeletons are used to implement fine-grained parallelism in a dynamic (assignment at runtime) and in a static (a priori assignment) way. The performance evaluation showed that the static assignment is as efficient as a state-of-the-art barrier. Thereby, parallelism is explicitly expressed in a model and implemented in a timing analyzable way.