Anti-radiation design and irradiation test of antifuse FPGA

Antifuse FPGA because for its low power consumption, high reliability, high security, etc., are widely used in space electronic systems. However, antifuse FPGA running in the space environment is also vulnerable to space radiation. This paper analyzes the single event effects in antifuse FPGA in detail and put forward the TMR and EDAC anti-SEE hardening design and implementation methods. The ground heavy ions accelerated test is conducted to verify the design of hardening; test results and analysis show that the hardening design method can effectively improve the COTS antifuse FPGA for space applications reliability.