Power-pulsing schemes for vertex detectors at CLIC

The precision requirements of the vertex detector at CLIC impose strong limitations on the mass of such a detector (?radiation length, Xo, per layer). To achieve such a low mass, ultra-thin hybrid pixel detectors are foreseen, while the mass for cooling and services will be reduced by implementing a power-pulsing scheme that takes advantage of the low duty cycle of the accelerator. The principal aim is to achieve significant power reduction without compromising the power integrity supplied to the front-end electronics. A power-pulsing scheme is proposed for the analog electronics and its electrical features are discussed on the basis of measurements.