Application Performance on the High Performance Switch

2005 
In 2004 the HPCx system underwent a major upgrade, including the replacement of the 1.3 GHz POWER4 processors by 1.7 GHz POWER4+ and the “Colony” SP Switch2 being superceded by IBM’s High Performance Switch (HPS). The aim of the upgrade was to effect a factor of two performance increase in the overall capability of the system. We present the results of a benchmarking programme to compare the performance of the Phase1 and Phase2 systems across a range of capability applications of key importance to UK science. Codes are considered from a diverse section of application domains; materials science, molecular simulation and molecular electronic structure, computational engineering and environmental science. Whereas all codes performed better on the Phase2 system, the extent of the improvement is highly application dependent. Those which already showed excellent scaling on the Phase1 system, CPMD, CRYSTAL, NAMD, PCHAN and POLCOMS, in some cases following significant optimisation effort by the HPCx Terascaling Team, showed a speed-up which was close to the increase in processor clock speed of 1.31. Other applications, AIMPRO, CASTEP, DL_POLY, GAMESS, and THOR, for which the performance of the interconnect was a critical issue, showed much greater performance increases ranging from 1.65 to 2.88. The PDSYEVDbased matrix diagonalization benchmarks showed even greater improvement, up to a factor of 3.88 for the larger matrix size. This is a Technical Report from the HPCx Consortium. Report available from http://www.hpcx.ac.uk/research/publications/HPCxTR0417.pdf © UoE HPCx Ltd 2004 Neither UoE HPCx Ltd nor its members separately accept any responsibility for loss or damage arising from the use of information contained in any of their reports or in any communication about their tests or investigations. Application Performance on the High Performance Switch ii
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