SAINT: handling module folding and alignment in fixed-outline floorplans for 3D ICs

Three-dimensional integrated circuits (3D ICs) offer significant improvements over two-dimensional circuits in several aspects. Classic 3D floorplanning algorithm places each module at one single die. However, power consumption and wirelength of a 3D IC may be further reduced if it contains folding modules or stack modules such as stack memory. Hence, this paper proposes a fixed-outline 3D floorplanning algorithm which can simultaneously handle different kinds of modules such as soft modules, hard modules, folding modules, and stack modules. In order to maintain the shape of a 3D module, our algorithm aligns the sub-modules of a folding (or stack) module such that they have identical coordinates in respective dies. Experimental results have demonstrated efficiency and effectiveness of our approach even in large benchmarks such as IBM circuits.