New Characterization Methodology of Borderless Silicon Nitride Charge Kinetics Using C-V Hysteresis Loops

In this paper, a new characterization methodology of borderless silicon nitride is presented. This material, deposited by a plasma-enhanced chemical vapor deposition process, contains a large charge quantity attributed to K centers. A steady-state capacitance-voltage (C-V) behavior has been researched, while taking into account charge considerations, electrical field, and time influence. It is achieved by a capacitance vs time at constant voltage experiment after a complete C-V hysteresis used to set up an initial state of charge. The charge evolution occurring during stress time is related to the charge-transformation kinetics. An empirical kinetic model has been extracted from these results, with time constant dependent on field and temperature. A faster positive to negative charge transformation has been shown, attributed to an easier hole trapping. Finally, this new characterization method demonstrates that data retention charge loss is correlated with trapping kinetics in borderless silicon nitride. © 2008 American Institute of Physics. [DOI: 10.1149/1.2844353] All rights reserved.