Characterization Measurement Results of MuTRiG - A Silicon Photomultiplier Readout ASIC with High Timing Precision and High Event Rate Capability

The MuTRiG chip, which is dedicated to the Mu3e experiment, is a 32 channels mixed-signal Silicon Photomultiplier readout ASIC with high timing precision and high event rate capability designed and fabricated in UMC 180nm CMOS technology. It combines the excellent timing performance of the fully differential analog front-ends and the 50ps time binning TDCs with a high event rate capability from a dedicated on-chip digital logic circuit and a gigabit LVDS serial data link. The design of the chip and the results from the characterization measurements will be presented.