Very-low-tranconductance CMOS amplifier using multi-tanh bulk-driven input stage with gate-controlled assymetry for G m -C applications

A novel structure of the multi-tanh bulk-driven input stage OTA is presented in this paper. The circuit was designed and simulated in a 130nm CMOS process. The results show a nominal transconductance of 1.593 nS with an input linear range of 400 mVpp, assuming a THD no greater than -40 dB. The system supply voltage is 1.2 V (given by the technology), and the power consumption goes up to 315.7 nW. The achieved ultra low transconductance, along with the wide linear range (33% of the dynamic range) makes the transconductor highly suitable for low-frequency biomedical G m -C applications. Furthermore, Monte Carlo analysis was conducted and showed the circuit possesses high resilience to process variation and mismatch: transconductance's standard deviation lower than 4% of its nominal value, and maximum THD of -40 dB.