Solutions for Wafer-Level Packaging of High Brightness LEDs

2011 
High brightness LEDs (HB-LEDs) carry a high prospect for general lighting applications. Competing with the cost/performance ratio of current light sources demands an increase of the overall efficiency as well as the reduction of the device cost. Since packaging accounts for 30%–50% of the cost of HB LED manufacturing, moving from die- level to wafer-level processes is one likely potential solution for reducing cost per lumen. Silicon-based WLP, using the established processing technology of the MEMS and IC industry, offers high fabrication reliability, high yield and the direct integration of the driver IC in the package. The already small form factor of WLP can be further reduced using Through-Silicon-Vias (TSV), increasing the maximum amount of chips per wafer. Silicon WLP also offers superior thermal management, with the relatively high thermal conductance of silicon. Redistributing LED dies on silicon wafer submounts, with metal bonding and copper TSVs, further improves the heat conductance away from ...
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