Modulo Scheduling for Loops with Conditional Branches onto Coarse-Grained Reconfigurable Architectures

Coarse-Grained Reconfigurable Architectures (CGRAs) have gained currency in recent years due to their abundant parallelism, high computational intensity and flexibility. CGRAs have been structured for accelerating computation intensive parts like loops that require large amounts of execution time. Loops with conditional branches have multiple execution paths which are difficult to software pipeline. In this paper we review the works done in handling conditional branches of loop. We present the advantages of Predicated Execution and Speculative Execution to exploit the conditional branches of loop onto CGRAs. We suggest some architecture extensions to support conditional branches on CGRAs and future directions of research.