MogaMap2: Multi-Objective Mapping Algorithm with parameter control for Optimize Area, Performance and Power Consumption in FPGA

This article presents a new technology mapper, MogaMap2, the second generation of the technology mapper, MogaMap, based on a hybrid approach that use evolutionary algorithm associated with specific heuristics of the problem in order to find better trade-off results among area, performance and power consumption. Different from MogaMap, the new approach includes a deterministic parameter control that, during the process, modifies the mu tation probability. In a set of 20 large designs, we find that this adjust of parameter allow to reduce, in average, the LUT count in 2% and the edge count in 4%. In comparison to state-of-the-art technology mapping, our approach is able to reduce the LUT counts in 3% and the edges count in 10%. Placing and routing the resulting netlists leads to an 3% reduction in the complex logic blocks count, a 7% increasing in estimated operation frequency and 8% reduction in energy consumption.