Mitigation of common mode voltage in five phase multilevel inverter

2020 
Abstract This paper exhibits the new modified sine wave pulse width modulation technique in a multilevel inverter to a decrement in the common mode voltage. It focuses on different schemes for decrease of CMV to reduce the circulating bearing current in poly phase induction motor drive. There are two different topologies considered for analysing the value of circulating bearing current in motor drives such as Neutral Point Clamped Inverter (NPC) topology and Cascaded inverter topology. The identified better topology to reduce circulating bearing current is cascaded topology. The simulation model of the proposed five phase five level inverter circuits are developed under the MATLAB-SIMULINK. The use of five phases in this technique is to enhance the productivity of machine and to reduce the losses in the machine unlike the three- phase machine which accounts for more losses compared to five phases. Simulation results are contrasted to those of theoretical calculations to examine the common mode voltage. Total Harmonic Distortion (THD) comparison is also done under Fast Fourier Transform (FFT) analysis between NPC inverter topology and cascaded inverter topology.
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