A 28 nm full-margin, high-reliability, and ultra-low-power consumption sense amplifier for STT-MRAM

Abstract A high-read-reliability and ultra-low-power consumption sense amplifier for the read path of a spin-transfer torque magnetic random-access memory is presented. The reliability in this research represents read accuracy of the memory. The basic concept is that power is supplied by capacitors. The proposed circuit uses 28 nm CMOS technology with an 1.2 V power supply. Simulation results show that when the bit-line voltage is 200 mV, the sensing margin is about 100 mV with reading data “0” and 160 mV with reading data “1”. The read energy is about 1 pJ/bit, which is 10 times lower than that achieved using the traditional scheme.