Ultra-thin dielectric insertions for contact resistivity lowering in advanced CMOS: Promises and challenges

In this paper, in order to provide a comprehensive overview of the opportunities and limitations of the metal/insulator/semiconductor contacts approach, expected performance based on ideal contact simulations as well as key practical aspects are presented. While the former give us a glimpse of the theoretical potential of this paradigm, mainly to contact nFETs, the latter highlights concerns about the electrical characterization of such contacts along with issues occurring during their physical implementation.