Material, process, and device development of GaN-based HFETs on silicon substrates

Although sapphire (Al2O3) and various polytypes of silicon carbide (SiC) have been the most widely employed substrate materials for gallium nitride (GaN) heteroepitaxy, a burgeoning interest in GaN growth on silicon (Si) has emerged in both academic and commercial groups. Historically, the lack of widespread adoption of the GaN-on-Si approach has been attributable to technical challenges presented by the ~17% lattice mismatch and ~56% thermal expansion coefficient mismatch between GaN and Si (111). However, recent efforts have led to stress-relief buffer or transition layer schemes to overcome these limitations, allowing growth of crack-free (Al,Ga,In)N layers on highquality, low-cost, large-diameter Si substrates (1-3). Other inherent advantages of GaNon-Si include the ability to leverage well-established Si processing techniques such as wafer thinning, via-hole formation, and AuSi eutectic die attach. A unique feature specific to GaN growth on Si is the possibility to incorporate GaN functionality (e.g., light emission, high breakdown voltage, piezoelectricity) with Si-based devices and circuitry. Although applications requiring integration of these technologies are only beginning to emerge, micro-electromechanical systems (MEMS), chemical sensors, advanced logic, and 3-dimensional integration are a few areas of potential future development.