Bipolar Transistors on Si / MgO · Al2 O 3 / Si

1992 
SOI-bipolar transistors were fabricated by Si epitaxial layers on MgO.Al 2 O 3 epitaxial layers grown on Si wafers. Leakage current increased due to crystalline defects on the Si layer. By using solid-phase epitaxy (SPE) or seedless zone melting recrystallization (ZMR), crystalline defects were reduced. Stacking faults were reduced from 10 8 /cm 2 to less than 10 2 /cm 2 by solid-phase epitaxial growth of the amorphous Si layer. The leakage current of a bipolar transistor fabricated on a defect-reduced Si layer was less than 1 nA at 10 V
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