Hardware realization of a modification to the DQDB protocol to achieve fair network access and full bandwidth utilization

The DQDB topology and protocol have been accepted by the IEEE 802.6 committee as the standard for metropolitan area networks. Hardware to implement a proposed modification to the original DQDB is described. The important modifications of multiple segment buffering and the preservation mechanism have been realized in detail in the form of a set of circuits. System state generation circuits of the developed hardware have been successfully simulated and the performance has been verified. >