Adaptive Dynamic Partial Reconfigurable Security System

FPGAs plays a major role in areas like cloud, aerospace, defense etc. due to hardware acceleration and reprogrammable feature. Adaptive hardware which can change the hardware design after production on site is finding more application. Through partial reconfiguration, an adaptive hardware can change the design itself based on current requirements or other environmental conditions. The article proposes an adaptive security system where encryption and hash code generation hardware accelerators can be dynamically created on FPGA according to the application need using partial reconfiguration. The system can swap in and swap out the corresponding hardware accelerator during run time, which in turn reduces the area and power. Two reconfigurable partitions are created for encryption and hash code generation algorithm. Each can swap in and out two algorithms depending on application requirement are presented here. Using the proposed method, the partial reconfigurable design reduces the amount of resource requirement to 35.63% than a static design.