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Development of an FPGA-based Data Reduction System for the Belle II DEPFET Pixel Detector
Development of an FPGA-based Data Reduction System for the Belle II DEPFET Pixel Detector
2015
Michael Schnell
Keywords:
Field-programmable gate array
Data reduction
Electronic engineering
Detector
Data acquisition
Physics
Pixel
Singular value decomposition
pixel detector
vertex detector
Correction
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