DLL architecture for OFDM based VLC transceivers in FPGA
2016
This paper addresses the problem of achieving high bandwidth in a DLL design for OFDM based VLC broadcast systems. It describes the implementation of efficient Data Link Layer (DLL) and Forward Error Correction (FEC) modules in a Xilinx FPGA. The proposed DLL aims at furnishing the adequate means to fragment and route both high data-rate (HDR) and moderate data-rate (MDR) service requests while maintaining a continuous transmission flow. The FEC modules aims at providing sufficient error correction capabilities with reasonable computation overheads. Another goal was to develop these modules under a globally asynchronous locally synchronous paradigm, ensuring high modularity and performance.
Keywords:
- Error detection and correction
- Field-programmable gate array
- Real-time computing
- Orthogonal frequency-division multiplexing
- Bandwidth (signal processing)
- Forward error correction
- Architecture
- Computer network
- Data link layer
- Globally asynchronous locally synchronous
- Computer science
- Broadcasting
- Computer hardware
- Transceiver
- Embedded system
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
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