BEoL Layout Design Considerations to Mitigate CPI Risk

We present a summary of some of the main Back End of Line (BEoL) design optimization techniques to mitigate Chip Package Interaction (CPI) risk in flip-chip configuration. Optimization techniques include metal tiles right on top of the metal stack at the corner of the die beyond the bumps, diagonal final aluminum cap metal lines under the corner bumps, octagon shape of the pads under the bumps, 80° PSPI angle opening, as well as wider double rail crackstops.