CMOS field emission devices based on {111} silicon surfaces

A complementary metal–oxide–semiconductor process for field emission devices based on {111} silicon surfaces is presented. Structure sizes below 300 nm are produced with i-line lithography and sizes below 100 nm with an additional epitaxial layer. Dot- and line-based structures are investigated by molecular beam epitaxial growth, and {111}-apexes are formed by lateral limitation of the growth site. Qualitative agreement of the experimental observations with a simple model based on total free energy calculations is found. For widths smaller than the migration length quantitative agreement is also found. Nanometer sized silicon ridges with a {111}-apex and curvature radii below 20 nm are used as diode field emission devices. Electrical characterization by simulation and measurement are shown. Electrostatic simulations indicate emission from the ends of the ridges due to higher fields, and therefore, two emission sites per ridge are expected. Distinct linear regions in Fowler–Nordheim coordinates are observe...