Deposition conditions and post deposition treatment of Pr and La Oxide gate dielectrics: Effect on interface, leakage, and Si content

Pr and La oxide thin films were investigated in the context of their application as high-k dielectrics in Complementary Metal Oxide (CMOS) technology. The films were deposited by Molecular Beam Epitaxy (MBE) on bare and TiN-covered Si(001). The influence of growth and post-deposition temperature on the composition and electrical parameters was studied. We observed Si penetration from bare Si(001) into the growing film. On the basis of the results of Capacitance-Voltage (CV) measurements and ab initio calculations we conclude that Si is a source of defects responsible for leakage. We also addressed the mechanism of the formation of the interface region between Pr 2 O 3 and Si(001) and the role of moisture in this process. We argue that substrate oxidation is mediated by OH which, in contrast to oxygen, can penetrate the interfacial silicate even at room temperature. In unprotected films, a low-density interfacial layer is formed in this way.