A 2 M-pixel two-level vertically integrated HDTV image sensor

A 2 Mpixel two-level CCD (charge-coupled device) image sensor which has no capacitive image lag is discussed. Image lag is reduced to 0.4% and the dynamic range expanded from 72 dB to 110 dB. A schematic diagram of this device is shown. The pixel structure adopts an additional storage-diode-resetting gate (SRG) and bias-charge-injecting diode (CID) formed adjacent to a vertical CCD. A single CID is shared by two horizontally adjacent pixels, allowing the charge to be injected into two storage diodes simultaneously. >