Metal oxide semiconductor (MOS) transistor lightly doped drain region manufacturing method

The invention discloses a metal oxide semiconductor (MOS) transistor lightly doped drain region manufacturing method. The MOS transistor lightly doped drain region manufacturing method is applied to the manufacturing field of semiconductor integrated circuits. The method comprises that flanks are manufactured on two sides of a polysilicon gate; photoetching is conducted to a drain source of a MOS transistor; phosphonium ions are implanted to form an N- region. Edges of one side of the N- region extend to the lower portion of the flank; arsenic ions are implanted, wherein the direction of arsenic ion implantation is perpendicular to wafers when the arsenic ions are implanted; photoresist which is located on the surface of the MOS transistor is eliminated; drain source annealing operation is conducted to the MOS transistor and the phosphonium ions extend from the lower portion of the flank to the lower portion of the polysilicon gate to form a N type lightly doped drain region and the arsenic ions form a source region and a drain region. The MOS transistor lightly doped drain region manufacturing method can reduce the processing steps in the MOS transistor lightly doped drain region manufacturing process.