Filtro de FI para un procesador GSM

This paper describes the design of a 5 order elliptic filter for the Intermediate Frequency (IF) stage of a GSM transceiver. The filter was designed by substituing floating inductors with girators. The cut-off frequency of the filter is about of 200 MHz and the power consumption is about of 5.1 mW. The simulation was made by using HSPICE BSIM3V3 MOS transitor models for a 0.35 μm AMS process.