50Gb/s 3.3V logic ICs in InP-HBT technology
2004
50Gb/s 3.3V InP-HBT logic ICs with 6ps rise time and 1200mVpp output swing include: D-flip-flop, double-edge triggered flip-flop, dividers, a frequency doubler, XOR/OR gates, and a 1:2 fanout buffer. The DFF has 3ps/sub pp/ deterministic and 270deg phase margin, and 12mV/sub pp/ sensitivity at 40Gb/s and 10/sup -12/ BER. The ICs dissipate 480-840mW in 1mm/sup 2/.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
5
References
0
Citations
NaN
KQI