SESSION X: ANALOG FILTERS AND OSCILLATORS

IN TELECOMMUNICATION SYSTEMS the demand for monolithic filters is dominated by the concern for high performance processing of the analog signals at minimum power. Charge Coupled Devices (CCD) are, in general, a good choice for such applications’. Infinite Impulse Response (IIR) filters have had rare usez because of the possibility of self oscillation when multiple conversions between the charge and voltage domain in the feedback loop are used. Only strictly passive recursive CCD resonators374 eliminate all possibilities of self oscillations since all operations are performed in the charge domain. Recent applications of passive CCD re~onators~’~ documented their distinct advantage of a fixed center frequency independent of fabrication tolerances, and a relative bandwidth dependent solely on the ratio of two MOS capacitances. This paper will describe a low-power CCD signal filter (97Hz 3dB-bandwidth at 131.85kHz) for FDM channel modems, where it is part of the signaling circuitry and is followed by a level detection circuit. The filter is implemented with CCD-input stages to obtain a sampling rate of 4.7MHz at a CCD clock frequency of 1.18MHz. Dynamic techniques are used for the clock generation circuitry to reduce the total power consumption for the two filters on a chip to 75mW. The filters operate on a single 12V supply and require a 2.37MHz master clock. The size of the time-continuous RC-prefilter is reduced as an improved transversal prefilter assures attenuation of all parasitic pass-bands of the recursive section. The center frequency of the filter is as stable as the master clock. A microphotograph of the new passive CCDsignal filters is shown in Figure 1. The die size for the chip with two filters and support circuitry is 3.2 x 4.0mm .