Разработка методики построения непозиционного процессора с деградируемой структурой

This paper describes a method of constructing special processor failover digital signal processing (DSP ) capable of maintaining a healthy state when a sequence of failures and crashes. Application of this technique allows for the development nonpositional th special processor with degradable structure. Implementation of the computing device based on the system of the polynomial residue class allows, through the use of integer nonpositional mathematical model DSP to provide not only high-speed signal processing, but also perform procedures associated with finding and correcting errors that occur in the process of JV.