A Fully Cmos 622 Mbit/s Atm Switching Element

This paper deals with the CMOS realization of a circuit for ATM (Asynchronous Transfer Mode) switching applications. We realized the basic component of a switching architecture that receives the ATM cells at about 622 Mbitis. We used commercial devices to solve the high speed transmission problem, in order to realize the switching element with a low cost and low power dissipation technology (CMOS). The core of our module is the switching element named GBITSW, which performs the basic cell switching functions. It allows to switch 4 incoming ATM links onto 4 output links at the same speed; the input/output ports of the GBITSW have a 8 bit parallel interface. The circuit is fully CMOS, realized in a 1.2 krn technology, by using a CELL BASED approach. It works at 90 MHz, I/O data flow at 90 Mbitis. We used special I/O pads with a 1 Volt swing (OV, 1V) and particular solutions for the shared buffer SRAM (320 words x 128 bits), in order to allow high speed and low power dissipation. The circuit complexity is about 350000 transistors, it is (9.2 x 9.2) mm2, it is housed in a 144 pin CPGA package. The power dissipation is about 1.2 W at 90 MHz.