The receiver engine chip-set for digital audio broadcasting

The described DAB (digital audio broadcasting) receiver system, consisting of the analogue front-end and the digital baseband IC D-FIRE, offers the most compact receiver design available in the market today. Furthermore, the power consumption of the complete system is lass than 2 Watt in total for fullstream decoding, i.e., 1.7 Mbit/s. This paper describes the first true VLSI single chip solution for DAB. The D-FIRE (DAB-fully integrated receiver engine) is a 7 Mio. transistor chip fabricated in LSI logic 0.35 /spl mu/m process. Due to the on-chip ADC, RAM and audio decoder, no additional hardware is required for audio only applications. Extended with a 2 Mbit SRAM the maximum data-rate of 1.7 Mbit/s can be decoded while the system can dynamically follow a multiplex reconfiguration. This paper describes the architecture, some technical solutions and the features of the DAB receiver engine chip-set.