Technological Aspect of the Trigger-Less Readout Architecture for the LHCb Upgrade at CERN

The LHCb experiment has proposed an upgrade of its detector in order to collect data at ten times its initial design luminosity and increase the amount of data collected by a magnitude factor of 10. In this paper, the new technological aspects for such a complex upgrade are outlined, together with the most important challenges which are being faced in order to satisfy the requirements of the upgrade. New detectors are being developed in order to cope with harsher running conditions, such as more number of vertices per collision and more occupancy, while still retaining the current excellent performance. Moreover, a new readout architecture is envisaged in order to sustain a multi-Tb/s data flow. The new architecture aims at ultimately removing the LHCb first-level hardware trigger making all events from LHC collisions available to a trigger selection process performed entirely by software running in a powerful, flexible and fast computing farm. In this regard, technological solutions and implementations for new Front-End electronics and for a real-time multi-Tb/s Data Acquisition system are outlined. Lastly, plans for the deployment of the upgraded system are also given.