Parity Based In-Place FFT Architecture for Continuous Flow Applications

The current paper introduces a continuous flow radix-2 FFT architecture with a conflict free parallel access in-place technique. The parity based technique stores the FFT input elements into two memory banks, and keeps each element at its input address through the entire FFT process. Moreover, it results in improved address generation and control circuits compared to hitherto published results. The FPGA implementation and the comparison with FPGA available cores show the advantages of the resulting architecture.