Hardware implementation of digital signal processing algorithms for long distance pipeline inspections

Inspections on transmission pipelines in the petrochemical industry are regularly conducted in order to guarantee safety of operations. Inspection devices are sent through the lines to record sensor data, this data needs to be post-processed in order to be able to make an analysis on the state of the pipeline. In this thesis, existing software implementations of post-processing algorithms are taken and implemented in VHDL code. This code is synthesizable for implementation in a field programmable gate array (FPGA). Goal is to reduce the time require for post-processing. A test environment is implemented which is able to feed data to the FPGA and receive the processed data back. This environment consists of a Linux PC, which communicates in DMA mode over the PCI-Express bus to the FPGA. The test environment is functional, it shows a performance increase of eight to fourteen times compared to the software implementation. A proposal is made for speeding this up even more, by using concurrent processing on multiple processing nodes.