Increasing integration scale of superconductor electronics beyond one million Josephson junctions

2020 
We review the existing fabrication processes for superconductor digital electronics and describe approaches to increasing the scale of integration of superconducting digital circuits from the current level of about one million Josephson junctions (JJs) on a 1-cm2 chip toward ten million JJs per chip. We present designs of ac-clocked Single Flux Quantum (SFQ) shift registers, convenient benchmarking circuits, in a 250-nm-linewidth superconductor electronics fabrication process developed recently at MIT Lincoln Laboratory (MIT LL). For shift registers using resistively shunted JJs with Josephson critical current density, J c of 100 μA/μm2, we achieved a record-high circuit density of 4.2106 JJs per cm2, a factor of three higher than the previous record obtained in the MIT LL 350-nm-linewidth SFQ5ee process. Using self-shunted JJs with J c of 600 μA/μm2, we increased this record circuit density to 7.4106 JJs per cm2.
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