A Multi-Loop Slew-Rate Enhanced NMOS LDO Handling 1A Load Current Step with Fast Transient
2020
High current, small area, and superior transient response LDO is gaining increasing attention for the battery-powered 5G mobile application. This paper presents an NMOS LDO realized in 0.13μm CMOS process featuring a 10mV undershoot and overshoot with 1A/100ns load current. The superior transient performance is achieved by a new multi-loop feedback scheme. The presented LDO also embodies a new frequency compensation scheme, which enables a stable 60dB dc loop gain despite 1A load current variation. This contributes to a small load regulation and line regulation of 0.6μV/A and 0.23mV/V, respectively. The LDO consumes 35μA quiescent current in mission mode. The silicon size of the LDO is 325μm × 106μm.
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI