Improved ISFET Readout Circuit: Characterization and Comparison

An improved readout circuit topology for Ion Sensitive Field Effect Transistor (ISFET) is presented in this work. The proposed circuit is derived from two circuits presented in the literature: CIMP (Complementary ISFET-MOSFET Pair) with gate feedback and AIS (Active ISFET Sensor) readouts. In order to assert the improvements concerning sensitivity and stability, the proposed circuit behavior is compared against three other related circuits previously presented in the literature. BSIM3v3 and ISFET macromodel SPICE simulations results show that the proposed circuits present improved in sensitivity, linearity and stability when compared with classical circuits. All circuits were simulated using transistors in O.35f.1m CMOS technology.