Old Web
English
Sign In
Acemap
>
Paper
>
A 33mb/s Data Synchronizing Phase-locked-loop Circuit
A 33mb/s Data Synchronizing Phase-locked-loop Circuit
1988
Llewellyn
Wong
Tietz.
Tucci
Keywords:
Electronic engineering
Voltage regulator
Computer science
Synchronizing
Phase-locked loop
Threshold voltage
Voltage divider
Control engineering
Mesh analysis
phase locked loop circuit
pulse circuits
Electrical engineering
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
17
Citations
NaN
KQI
[]