A data pattern-tolerant adaptive equalizer using spectrum balancing method

This paper presents a data pattern-tolerant adaptive equalizer using spectrum balancing method. In addition to a high-frequency boosting control loop, this equalizer has a corner frequency control loop to guarantee its adaptation accuracy for various data patterns and data rates. Measured results show that the jitter of the eye is reduced by maximum 37%. The chip fabrication is based on the 0.18μm CMOS process and the equalizer core occupies 0.35mm 2 and consumes 85mW.