Si thickness influence on subthreshold currents at high temperatures in FDSOI CMOS

Fully depleted silicon-on-insulator (FDSOI) CMOS with thick buried oxide (BOX) can operate at higher temperatures compared to bulk CMOS. This work demonstrates, both experimentally and through simulations, that the subthreshold characteristics (off-state leakage current, I leak and subthreshold swing, SS) are greatly improved at high temperatures by reducing the Si thickness (t Si ) in FDSOI CMOS. Fabricated N and PFET devices exhibit low I leak leak . With proper gate electrodes FDSOI CMOS can achieve an I off < 1nA/μm at 300 °C for both P and NFETs. This result shows that FDSOI CMOS can find use as low power control logic at high temperatures.